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BA-4000 Bit Analyzer - Electrical 800G Bit Error Rate Tester

BER tester powered up with forward error correction (FEC) margin.

Key features

100G (4x28GBd), 400G (4x56GBd) & 800G (8x56GBd)
Supports NRZ and PAM4
Supports PRBS 7/9/11/13/15/23/31/13Q/31Q, SSPRQ
FEC capability: RS-FEC Scrambled Idle Pattern for testing 53 GBd host side interfaces
Channel simulator
Burst/random error injection
Supports linear/gray mapping
O-SMPM connection


Test and validation of transceivers
Test of subassemblies such as TOSA and ROSA
Test of FPGA, Module Compliance Board (MCB) and Host Compliance Board (HCB)


Bit error rate (BER) is a key performance attribute for digital communications. The signal transmission quality of a network, subsystem or component, can be evaluated using a BER tester, which compares the data stream received to the transmitted sequence and computes the number of errors.

The BA-4000 Bit Analyzer is an electrical NRZ/PAM4 BER tester designed for the production floor. It comes in six models:

  • BA-4000-4-28-NRZ: 100G BERT including 4-channel NRZ 28 Gbit/s.
  • BA-4000-8-28-NRZ: 200G BERT including 8-channel NRZ 28 Gbit/s.
  • BA-4000-4-28-PAM: 100G/200G BERT enabling either 4-channel NRZ 28 Gbit/s or 4-channel PAM4 28 GBd.
  • BA-4000-4-56-PAM: 200G/400G BERT enabling either 4-channel NRZ 56 Gbit/s or 4-channel PAM4 56 GBd.
  • BA-4000-8-28-PAM: 200G/400G BERT suitable for either 8-channel NRZ 28 Gbit/s or 8-channel PAM4 28 GBd.
  • BA-4000-8-56-PAM: 400G/800G BERT suitable for either 8-channel NRZ 56 Gbit/s or 8-channel PAM4 56 GBd.

The BA-4000 Bit Analyzer leverages FEC simulation capabilities to provide powerful analysis for burst error. Some of the main FEC features are:

  • PRBS error check and correction
  • Pre-FEC and Post-FEC BER
  • KP4/KR4 and low latency FEC protocols
  • FEC Generator and Checker (FGC) to address RS-FEC Scrambled Idle Pattern
  • FEC symbol error distribution plot: codewords vs symbols errors
  • FEC margin auto-calculation


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